Press Releases

Plunify releases desktop plugin for rapid and scalable cloud-based fpga design and timing closure


Automated Timing Closure and Design Compilation Using Major FPGA Vendor Tools

Singapore, December 13, 2011 – Accelerating time-to-market and lowering development costs for FPGA designers, Plunify Pte Ltd today announced the release of FPGAAccel™ Client 1.0, a desktop plugin designed to enable cloud-based FPGA design with little or no disruption to existing workflows.  Hardware developers can immediately use the plugin to offload CPU- and memory-intensive tasks to Plunify’s managed cloud and run them in parallel, potentially reducing days of effort into a few hours.

Integrated directly with major FPGA software tools, the FPGAAccel client does not require a steep learning curve and needs only a working Internet connection.  Tasks like synthesis and place-and-route can be selectively sent for remote processing.  Because local resources are freed up, the FPGAAccel client can also be used when traveling or at a remote site.  Results are made available via both command-line and Web-based interfaces.

Focusing on timing closure as a particularly resource- and time-consuming process, Plunify has implemented algorithms into the FPGAAccel client to help users achieve timing closure as quickly as possible.  According to Harnhua Ng, Director of Engineering at Plunify, “According to our users, being able to run tasks in parallel with a simple script command has been a tremendous help, especially for timing closure. With the FPGAAccel client, one can start a series of builds before leaving the office and get all the results the following morning.”

The FPGAAccel client supports major FPGA software tools on Windows and Linux platforms, and is available as a free download at .

For more information, visit  A case study on Plunify’s scalable, distributed approach to attempting timing closure using cloud computing resources can be found at

About Plunify Pte.Ltd.

Plunify® cloud computing solutions enable semiconductor chip designers to shorten product time-to-market and reduce development costs with no disruption to existing workflows. For more on “Accelerating Time-to-Market with Cloud Computing”, and to find out more about Plunify’s EDAxtend platform and FPGAAccel products, visit Follow Plunify via Facebook, Twitterand Blogger. Plunify, Plunify EDAxtend and Plunify FPGAAccel are trademarks of Plunify Pte Ltd. All others are trademarks or registered trademarks of their respective owners.

Media Contact:

Harnhua NG
Plunify Pte Ltd