Cloud Platform Accelerates Chip Design Workflow, Now Offers Altera’s Quartus II
AUSTIN, TX – (Marketwired – Jun 4, 2013) – With the chip design community converging on Austin this week for DAC, new ideas, trends and technologies are sure to be the subject of many conversations. Joining the discussions to offer a fresh perspective on the design process is innovative start-up Plunify. Plunify’s approach utilizes the cloud as a platform, which allows FPGA designers to dramatically accelerate chip design workflows — and save time and money in the process.
Today, Plunify announced the immediate availability of Altera Quartus II for designing with Stratix, Cyclone and Arria devices. Quartus II is recognized as an easy-to-use software platform for programmable logic design. The new relationship with Altera marks the production availability of Plunify’s cloud based solution for FPGA design.
According to Harnhua Ng, vice president for Plunify, “The rising complexity of FPGAs and complex CPLDs can benefit from using the computing horsepower available through the cloud. This, along with Altera Quartus II, provides a powerful platform for designers.”
Limitations on compute resources are a fact of life. A cloud-based design platform enables design teams to carry out benchmarking, regression testing and design optimization efforts that often either cannot be done locally, or don’t have the priority for immediate execution. A cloud platform can save design teams time and effort, thanks to its scalability and flexibility.
Plunify’s cloud computing platform makes running and analyzing builds at scale much easier. Hardware design teams need to see if an existing design works when different parameters are applied, for example different FPGA software tool versions or changes in adjacent non-FPGA modules. Such regressions involve running multiple test vectors to quickly detect if something broke as a result of the changes. Plunify helps design engineers set up and execute regression workflows to evaluate many different scenarios at once.
When it comes to timing closures, analyzing critical paths, modifying design and re-compiling are critical, iterative steps in getting a design to meet timing. Using the cloud, Plunify helps design engineers execute and analyze multiple timing closure attempts in parallel, speeding up design closure efforts.
FPGAAccel WEB gives access to the Plunify for Quartus II tools for easy start-up. With FPGAAccel Command Line, the Plunify for Quartus II tools can be incorporated right from the command line.
Ng explained, “Whether you need 50 or 100 servers to solve the most pressing timing closure, regression testing and optimization issues, or just a few servers to finish up smaller tasks, Plunify for Quartus II provides a great, stress-free alternative to meet the most demanding IT needs.”
Plunify also gives designers access to advanced analysis and verification tools as well as hardware on demand – on a pay for what you need, when you need it basis. By combining all of this into a one-stop-shop for chip design, Plunify’s approach can generate a savings of greater than 50 percent — with a TCO reduction of between 35 and 55 percent.
“As an engineer myself, I know how difficult it is to keep costs and verification times in check with the added challenges of time and resource constraints,” added Ng. “Using the on-demand, scalable compute power of the cloud is the answer. Our cloud computing application platform is an idea whose time has come.”
Plunify encourages design engineers to see the results for themselves. Take the challenge: experience a free trial by registering at: https://www.plunify.com/en/register.php
Plunify® cloud computing solutions enable semiconductor chip designers to shorten product time-to-market and reduce development costs with no disruption to existing workflows. Follow Plunify via Facebook, Twitter and Blogger.
Lages & Associates