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FPGAAccel Client - Features

Automated Timing Closure

Attempt timing closure in parallel with a simple command. Timing closure can take multiple iterations and many overnight runs. Why wait? Plunify runs your design over 30 servers with selected tool settings, at the same time saving you a massive amount of time and iterations. Click here to read more in our case study

Lightweight and Secure

Small yet powerful. Downloaded in minutes, our script packages and encrypts your files with keys unique to you. All your data is transmitted only in a secured SSL channel to a dedicated location for added peace of mind. Click here to read more about our security. For more details, please feel free to contact us

Intuitive and Graphical Results

Compared to a full EDA software installation, FPGAAccel Client is easy to use and does not come with complex interfaces or lengthy user manuals. Viewing and downloading the results is just as easy. Leave the analysis to us and use our web report viewer to view your results in a graphical and intuitive manner.

Supports Netlist Files

To balance a need for higher security with upload speed/convenience, FPGAAccel Client accepts netlist files instead of RTL files. This means users can synthesize the design locally and send only netlist files. All files are still encrypted by default and place-&-route will be executed in the cloud. Your runtime in the cloud will be shorter as well.

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