![\"Paltek\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/Paltek.jpg\")
<\/a><\/strong>\nPaltek is organizing a seminar on the 14th Dec 2018 on InTime and Machine Learning (Japanese language only).
\nDate: December 14, 2017
\nLocation: Shinyokohama[\/vc_column_text][vc_column_text]
![\"XDF_2018\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2018\/09\/EDF2018.jpg\")
Event:\u00a0Xilinx Developer Forum 2018 – Frankfurt\n<\/strong><\/a>Plunify will showcase the upgraded cloud platform-Plunify Cloud and its applications including FPGA Expansion Pack, AI Lab, and InTime at Booth 1.
\nDate:\u00a0December 10, 2018
\nLocation: Frankfurt Marriott Hotel, Germany[\/vc_column_text][vc_column_text]
Event:\u00a0Xilinx Developer Forum 2018 – Beijing\n<\/strong><\/a>Plunify will showcase the upgraded cloud platform-Plunify Cloud and its applications including FPGA Expansion Pack, AI Lab, and InTime.
\nDate:\u00a0October 16, 2018
\nLocation: Beijing International Hotel, Beijing, China[\/vc_column_text][vc_column_text]
Event:\u00a0Xilinx Developer Forum 2018 – Silicon Vally\n<\/strong><\/a>Plunify will showcase the upgraded cloud platform-Plunify Cloud and its applications including FPGA Expansion Pack, AI Lab, and InTime at Booth 24.
\nDate:\u00a0October 1-2, 2018
\nLocation: Fairmont, San Jose, CA[\/vc_column_text][vc_column_text]
![\"IFTD2017\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2018\/09\/IFTD2018.jpg\")
Event: Intel FPGA Technology Day 2018<\/a><\/strong>\nPlunify will showcase timing optimization capabilities of the lastest InTime in Intel FPGA Technology Day (IFTD) 2018.
\nDate: September 21, 2018
\nLocation: Hotel Gajoen, Tokyo, Japan[\/vc_column_text][vc_column_text]
![\"logo_dac55\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/DAC2018.jpg\")
Event: Design Automation Conference 2018<\/strong><\/a>\nExperience the new InTime 2.6 and Plunify Cloud on the spot! Visit booth 2124!
\nDate:\u00a024 – 28 June 2018,
\nLocation:\u00a0Moscone Center,\u00a0San Francisco, CA[\/vc_column_text][\/vc_tta_section][vc_tta_section title=”2017″ tab_id=”1537243440979-2f513abb-fe7c”][vc_empty_space][vc_column_text]
![\"XDF_2017\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/XDF_2017.jpg\")
Event:\u00a0Xilinx Developer Forum 2017\n<\/strong><\/a>Plunify will launch the brand new cloud platform-Plunify Cloud at Xilinx Developer Forum 2017.
\nDate:\u00a0October 19, 2017 \u00a0Location: Beijing[\/vc_column_text][vc_column_text]
![\"IFTD2017\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/IFTD2017.jpg\")
Event: Intel FPGA Technology Day 2017<\/a><\/strong>\nPlunify will showcase timing optimization capabilities of InTime for Stratix 10 projects in Intel FPGA Technology Day (IFTD) 2017.
\nDate: September 14, 2017 \u00a0Location: Shenzhen
\nDate: September 19,2017 \u00a0 Location: Beijing
\nDate: September 26, 2017 \u00a0Location: Chengdu[\/vc_column_text][vc_column_text]Event: InTime Seminar by Paltek<\/a>
<\/a><\/strong>\nPaltek is organizing a seminar on the 1st Sept 2017 on InTime and Machine Learning (Japanese language only).
\nDate: September 1, 2017
\nLocation: Shinyokohama[\/vc_column_text][vc_column_text]
![\"Moore\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/10\/2017\/01\/Moore.jpg\")
Event: Demo of a FPGA optimization expert software based on Machine Learning<\/a><\/strong>\nIn this session, we introduced several common approaches for FPGA optimization, especially the one with InTime, an expert software produced by Plunify.
\nDate: July 10, 2017
\nLocation: Moore Live \u00a0(Online)[\/vc_column_text][vc_column_text]
\n
![\"logo_dac54\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/logo_dac54.jpg\"){kind=logo}
Event: Design Automation Conference 2017<\/strong><\/a>\nBring your FPGA design and see how we can optimize their performance on the spot! Visit booth 1631!
\nDate: 18 – 22 June 2017,
\nLocation: Austin Convention Center, Texas[\/vc_column_text][vc_column_text]
![\"logo\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/logo.jpg\"){kind=logo}
Event: Xilinx All Programmable Conference 2017<\/strong><\/a>\nVisit us at the Xilinx All Programmable Conference at the following locations to get an understanding and demo of InTime.\u00a0Plunify is located at the Comtech booth.
\nDate: May 3, 2017 \u00a0 Location: Sheraton Lido Hotel, Chengdu
\nDate: May 5, 2017 \u00a0 Location: Crown Plaza, Changsha[\/vc_column_text][\/vc_tta_section][vc_tta_section title=”2016″ tab_id=”1491883172381-6065419b-cce4″][vc_empty_space][vc_column_text]
![\"logo_iftd\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/logo_iftd.jpg\"){kind=logo}
Event: IFTD16 (INTEL FPGA Technology Day)<\/strong><\/a>\n25 August, 2016 – Singapore
\n8 September, 2016 – Hangzhou, China
\n13 September, 2016 – Chengdu, China[\/vc_column_text][vc_column_text]
![\"logo_smetc\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/logo_smetc.jpg\"){kind=logo}
Event: APEC SMETC2016 (\u7b2c\u4e5d\u5c4aAPEC\u4e2d\u5c0f\u4f01\u4e1a\u6280\u672f\u4ea4\u6d41\u66a8\u5c55\u89c8\u4f1a)<\/strong><\/a>\nSmall & Medium Enterprises Technology Conference and Fair
\n14 – 16 July, 2016
\nShenzhen Convention & Exhibition Center, China[\/vc_column_text][vc_column_text]
![\"innovfest\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/innovfest.jpg\")
Event: InnovFest unBound 2016<\/strong><\/a>\nLargest innovation festival in South East Asia
\n17 – 18 May, 2016
\nLevel 5, Marina Bay Sands Convention Centre, 10 Bayfront Ave, Singapore[\/vc_column_text][vc_column_text]
![\"conf_icon\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/conf_icon.jpg\"){kind=icon}
Event: Optimizing Classification for Learning-Driven Timing Closure of FPGA Designs<\/strong><\/a>\nInternational Symposium on Field-Programmable Custom Computing Machines
\nMay, 2016[\/vc_column_text][vc_column_text]
Event: Reliable Timing Closure for FPGA Designs through Machine Learning<\/strong><\/a>\nInternational Symposium on Field-Programmable Gate Arrays
\nFebruary, 2016[\/vc_column_text][\/vc_tta_section][vc_tta_section title=”2015″ tab_id=”1485233966254-21735e06-a581″][vc_empty_space][vc_column_text]
![\"semisr_logo\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/semisr_logo.jpg\"){kind=logo}
Event: SemIsrael Expo 2015<\/strong><\/a>\n17 November 2015
\nAvenue Convention Center, Airport City, Israel[\/vc_column_text][vc_column_text]
Paper presentation – Driving Timing Convergence of FPGA Designs through Machine Learning and Cloud Computing The 23rd IEEE International Symposium on Field-Programmable Custom Computing Machines<\/strong><\/a>\nMay 3-5, 2015
\nVancouver, British Columbia, Canada[\/vc_column_text][vc_column_text]
Paper presentation – InTime: A Machine Learning Approach for Efficient Selection of FPGA CAD Tool Parameters 23rd ACM\/SIGDA International Symposium on Field-Programmable Gate Arrays<\/strong><\/a>\nFebruary 22 – 24, 2015
\nMonterey Conference Center, Monterey, California[\/vc_column_text][vc_column_text]
![\"webinarimg\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/webinarimg.jpg\")
Webinar – Got FPGA Timing Closure Problems?<\/strong><\/a>\nWatch Plunify\u2019s webinar to learn how to solve your most difficult timing problems.
\nMarch 10, 2015[\/vc_column_text][\/vc_tta_section][vc_tta_section title=”2014 AND OLDER” tab_id=”1485233983654-c3499a83-b1f7″][vc_empty_space][vc_text_separator title=”2014″ style=”shadow” el_width=”80″][vc_column_text]
\n
![\"logo_dac50\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/logo_dac50.jpg\"){kind=logo}
Event: Design Automation Conference 2014 (San Francisco)<\/strong><\/a>\nVisit us on June 1 – 5, 2014
\nMoscone Center[\/vc_column_text][vc_text_separator title=”2013″ style=”shadow” el_width=”80″][vc_column_text]
<\/a>Event: Design Automation Conference 2013 (Austin)<\/a><\/strong>\nVisit us on June 5, 2013
\nLocation: Austin, Texas[\/vc_column_text][vc_column_text]
![\"logo_ces\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/logo_ces.jpg\"){kind=logo}
Event: Suite Innovation, Consumer Electronics Show <\/strong><\/a>\nVisit us on January 8-11, 2013
\nVenetian Palazzo Hospitality Suite, Venetian Tower, Las Vegas[\/vc_column_text][vc_text_separator title=”2012″ style=”shadow” el_width=”80″][vc_column_text]
Event: Design Automation Conference 2012\n(San Francisco)<\/strong><\/a>
\nVisit us on June 6, 2012
\nTime: 12:30 PM – 1:30 PM
\nLocation: Room 105 (Exhibit Floor)[\/vc_column_text][vc_column_text]
\n
![\"logo\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/semiconsg2012.jpg\")
Event: SEMICON Singapore 2012<\/strong><\/a>\nPlunify had the opportunity to showcase FPGAAccel and the capabilities of its cloud platform at this annual semiconductor industry event.
\nApril 24 – 26, 2012
\nMarina Bay Sands Expo & Convention Center[\/vc_column_text][vc_text_separator title=”2011″ style=”shadow” el_width=”80″][vc_column_text]
![\"event_01\"](\"https:\/\/www.plunify.com\/en\/wp-content\/uploads\/sites\/8\/2017\/01\/event_01.gif\")
Event: Accelerate Time-To-Market Using Cloud Computing <\/strong><\/a>\nOrganized by the Singapore Semiconductor Industry Association (SSIA), Plunify presents a case of “What can FPGA designers do with their own personal data centers”. (Slides<\/a>)
\nOctober 14, 2011[\/vc_column_text][vc_column_text]Adventures at DAC<\/a>
<\/a><\/strong>\nPlunify was at Design Automation Conference meeting up with tool and IP partners. The Design Automation Conference is the world’s leading technical conference and trade show on electronic design automation. For over 48 years, DAC remains the world\u2019s premier conference on Electronic Design Automation (EDA).
\nJun, 2011[\/vc_column_text][\/vc_tta_section][\/vc_tta_tabs][\/vc_column][vc_column width=”1\/4″][vc_message]<\/p>\n